Kopo ya Differential Oscillators ka High - Lebelo FPGAs

Sep 24, 2025 Tlogela molaetša .

Kopo ya Differential Oscillators ka High - Lebelo FPGAs

 

Di-oscillator tša phapano di na le dikgopelo tše bohlokwa kudu ka go meralo ya FPGA ya lebelo le legolo, kudukudu ka ditshepedišong tšeo di nago le dinyakwa tše di phagamego tša go nepagala ga tšhupamabaka, bokgoni bja go lwantšha - tšhitišo, le botshepegi bja leswao, go swana le:

High -lebelo serial segokanyimmediamentsi sa sebolokigolo (PCIe, SFP + / QSFP, 10G Ethernet, DDR4 / DDR5)

Ditshepedišo tša go hwetša datha tša dikanale tše dintši

Ditshepedišo tša kgokagano tša lebelo le legolo - (SerDes) .

Dithulaganyo tša go nyalantšha ka nepo (go setempe nako, go otlela ka ADC/DAC) .

Differential Oscillator ke eng?

Differential Oscillator ke oscillator ya kristale ye e šomago yeo e ntšhago matshwao a phapano (go swana le LVDS, LVPECL, HCSL), e tšweletša matshwao a mabedi a tšhupamabaka (CLK + le CLK−) ao a fetotšwego go e nngwe le e nngwe. E fapana le setso e le 'ngoe - qetellong oscillators (mohlala, CMOS - dipholo tsa Oscillators).

Mehola ya Matshwao a Phapano:

Sebopego

Letshwao la Phapano

Single-Letshwao le Fedilego

Bokgoni bja go lwantšha -tšhitišo

Matla (tlwaelegilego - mokgwa wa lešata phumola) .

Fokola

Botshepegi bja Letshwao

Matshwao a mabotse, a bonolo go a fetišetša a lebelo le legolo -

Diila

Bokgoni bja go Kganna

Godimo, e loketše phetišetšo ya lebelo le letelele-sekgala/lebelo le legolo-

Fase

Tiragatšo ya Jitter

Fasana

E phagame ka tekanyo e itšego

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Kopo ya Differential Oscillators ka High - Lebelo FPGAs

Go šoma bjalo ka Sešupanako sa Tšhupetšo sa Dikgokagano tša Lebelo la Godimo-

Didirišwa tša go dirišana tša lebelo le legolo go swana le PCIe, 10G/25G Ethernet, le SATA di swanetše go šomiša dišupanako tša tšhupetšo tša phapano;

Di-oscillator tša phapano tša 100 MHz goba 156.25 MHz (mohlala, ditšweletšwa tša HCSL/LVDS) di šomišwa ka tlwaelo;

Dimmojule tša transceiver tša lebelo le legolo (Ditransceiver) tša go swana le GTX/GTH/GTP ka gare ga di-FPGA di nyaka dišupanako tše tša tšhupetšo ya phapano.

✅ Kgokagano ye e Tlwaelegilego: .

Differential Oscillator → FPGA GTREFCLK0 / 1 (phahameng - lebelo transceiver tshupiso oache diphini)

Mothopo wa Sešupanako sa Motheo wa Sehlare sa Sešupanako

Ka dithulaganyo tša lebelo le legolo -kanale, oscillator ya phapano e otlela chip ya kabo ya tšhupamabaka (mohlala, SI5341/AD9528), yeo ka morago e ntšhago dišupanako tše ntši tše di nyalantšhago;

E loketše go logaganya tšhupamabaka ka kgokaganong ya multi-ADC, DAC, le FPGA.

✅ Seswantšho sa Sebopego: .

Oscillator ya Phapang → Chip ya Taolo ya Sešupanako (mohlala, PLL / Fanout Buffer)

Dišupanako tše ntši tše di Nyalagantšwego → FPGA/ADC/DAC

Kganna FPGA Ka hare PLL / MMCM

Differential oscillators ka fana ka phahameng - boleng oache inputs (mohlala, kena FPGA ka IBUFDS segokanyimmediamentsi sa sebolokigolo), 'me ka hare PLL / MMCM ka nako eo outputs lihora tse bakeng sa mong le e mong tsamaiso modula; se se kaonafatša boleng bja tšhupamabaka le go fokotša go šikinyega ga tšhupamabaka ya tshepedišo ka kakaretšo.

Mehuta ya Ditšweletšwa tša Diphapano tše di Tlwaelegilego le Go Sepelelana ga FPGA

Mohuta wa Ditšweletšwa

Tirišo ye e Tlwaelegilego

FPGA Segokanyimmediamentsi sa sebolokigolo Tshebedisano

LVDS ya

General phapang oscillator dipholo tsa mofuta

E thekgwa ke di-FPGA ka moka tše di tlwaelegilego (GTX/GTH input) .

HCSL ya

E sebediswa ka PCIe, seva motherboards

E thekgwa ka go lebanya (mohlala, Xilinx PCIe IP konokono) .

LVPECL ya go swana le

Ditirišo tša go šikinyega tša maqhubu a godimo -

Hloka kantle phediso tshwanelo le leeme resistors

CML

Ultra-high-speed links (>10 Gbps) .

E thekgwa ke di-transceiver tša FPGA tša mafelelo a godimo -

✔ Ho kgothaletswa ho sebelisa matched phapang dipholo tsa mofuta e le kgothaletswa ke FPGA moetsi.

Ditšhišinyo tša Kgetho ya Differential Oscillator

Paramethara ya

Boleng bjo bo Kgothaleditšwego

Botsitso bja Maqhubu

± 25 ppm goba kaone

Mohato Jitter (12kHz-20MHz) .

< 1ps RMS (required for high-speed interfaces)

Mohuta wa Ditšweletšwa

LVDS / HCSL e kgethilwego, go ya ka go sepelelana ga FPGA

Bokgoni bja Morwalo

Bokgoni bja go otlela Bogolo go feta goba bjo bo lekanago le 15pF goba bjo bo swanago le chip ya tšhupamabaka

Mokgwa wa Thempheretšha

Mophato wa intasteri (-40 tekanyo ~ +85 tekanyo ) goba ka bophara

Etiša pele protocol-maqhubu a kgothaleditšwego:

PCIe: 100 MHz ya;

SFP + / 10G Ethernet: 156,25 MHz;

25G / 40G Ethernet: 312,5 MHz;

JESD204B / C: 250 MHz, 312,5 MHz, 625 MHz, joalo-joalo.

Lebelela legoro la tšhupamabaka leo le kgothaletšwago ka go ditokomane tša semmušo tša FPGA;

Jitter e tlase e bohlokwa:

RMS jitter <0.5 ps (e hlokahalang bakeng sa phahameng - segokanyimmediamentsi sa sebolokigolo;

Bohlokwa kudu bakeng sa PCIe, JESD204C, le 10G/25G Ethernet.

✅ Maqhubu a Tlwaelehileng a Differential Oscillators ka High - Lebelo FPGAs

Maqhubu (MHz) .

Boemo bja Tirišo

Ditshwayotshwayo

100

PCIe Gen1 / Gen2 ya; General phahameng -lebelo logic dithulaganyo

Tlwaelegile kudu, e thekga HCSL / LVDS

125

Ethernet ya Gigabit

Loketseng bakeng sa segokanyimmediamentsi sa sebolokigolo joaloka GMII, SGMII

156.25

10G Ethernet (10GBASE - R / XAUI), SFP +, QSFP, segokanyimmediamentsi sa sebolokigolo CEI, joalo-joalo.

Standard maqhubu bakeng sa phahameng - lebelo serial puisano

200

DDR4 oache, multi - sekhahla transceiver tshupiso maqhubu a

Gantši e šomišwa bakeng sa go atiša maqhubu go tšweletša dišupanako tše di phagamego

212.5

JESD204B / C ya data phetolo dikgokelo

Standard maqhubu bakeng sa phahameng - maqhubu a fumana kgokagano segokanyimmediamentsi sa sebolokigolo

250

Ditshepedišo tša ADC/DAC tša lebelo le legolo -, ditshepedišo tše dingwe tša JESD204C

Dinyakwa tša jitter tše thata

312.5

25G Ethernet (25GBASE-R), dithulaganyo tša kgokagano ya optical tša lebelo le legolo

Ditšweletšwa tša phapano gantši ke CML/LVPECL

322.265625

CPRI (6.144 Gbps) tshupiso oache

Sebediswa ka kgokagano motheo seteishene FPGAs

644.53125

CPRI (12.288 Gbps), JESD204C dikgokelo tša lebelo le legolo -

Ultra-lebelo le phahameng - segokanyimmediamentsi sa sebolokigolo, hloka ultra- tlaase jitter oscillators

Ba bangwe (modiriši - ba hlalošitšwe) .

Tsenyo ya maqhubu a itšego go PLL bakeng sa go tšweletša maqhubu a nepišo

Hloka go tiišetša thekgo ya PLL ya ntlha ya go atiša

✔ Bakeng sa dikai itseng, ho kgothaletswa ho ikopanya le Hangjing thekiso kapa baenjiniere botekgeniki bakeng sa matched phapang dipholo tsa mofuta kgothaletso.

Kakaretšo

Aetheme

Melemo ya Differential Oscillators

Ka nepagalo

Jitter e tlase, maqhubu a tsitsitseng

Anti-tšhitišo

Matla, molemo tloaelehileng - mokgwa wa lerata hatello

Lebelo

E thekga phetišetšo ya lebelo la GHz-maemo a godimo-

Kgopelo

PCIe, SFP, DDR4/5, ADC, DAC, ditshepedišo tša go nyalantšha, bj.bj.

Differential oscillators ke hoo e ka bang karolo maemo a ka mehleng ea kajeno phahameng - lebelo FPGA dithulaganyo le ke disebediswa senotlolo netefatsa phahameng - lebelo puisano le synchronization tshebetso ya tsamaiso.

Ge e ba o na le mohlala o itšego wa FPGA (bjalo ka Xilinx Zynq Ultrascale +, Intel Stratix 10), mohlala wa oscillator ya phapano, goba tlhokego ya segokanyimmediamentsi sa sebolokigolo sa kgokagano (bjalo ka PCIe Gen3/SFP +), Suzhou Hangjing e ka go thuša go kgothaletša sekema sa peakanyo ya tšhupamabaka ye e loketšego kudu le tlhamo ya kgokagano ya sekema.